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Professor Simon McIntosh-Smith

Professor of High Performance Computing

Head of the High Performance Computing research group Department of Computer Science University of Bristol, UK

PI for the Isambard GW4 Tier 2 HPC centre Chair of the University of Bristol’s HPC executive committee

Email: simonm at cs dot bris dot ac dot uk Twitter: simonmcs


  • Graduated as Valedictorian in Computer Science from the University of Cardiff in 1991 (first class honours / summa cum laude)
  • Worked as a CPU architect at Inmos, STMicroelectronics and PixelFusion, before co-founding ClearSpeed as VP of Architecture in 2002
  • Joined the University of Bristol to lead research on HPC and computer architecture in 2009

HPC research interests

  • Performance portability techniques
  • Application-based fault tolerance (ABFT)
  • Exploiting emerging computer architectures, such as GPUs, Arm, many-core, FPGAs etc.
  • Computer architectures to reach Exascale: application-optimised co-processors, vector ISAs etc.



  • Chair of the University of Bristol’s HPC executive committee, and member of the Advanced IT Board (2017-)
  • PI of the Isambard GW4 project, the world’s first production Arm-based supercomputer
  • One of two UK representitives on the European e-infrastructure reflection group
  • PI of the first Intel Parallel Computing Center (IPCC) in the UK (2013-2017)
  • Contributor to both the OpenCL and OpenMP parallel programming international standards
  • Major contributor to the Sandia’s Mantevo mini-app suite of codes, specifically CloverLeaf and TeaLeaf
  • Founder of the International Workshop on OpenCL (IWOCL)
  • Chair of the EPSRC ARCHER2 national supercomputer project working group and member of the project board
  • Previously member of the ARCHER technical project working group (2010-2013)
  • External examiner for EPCC’s HPC and big data Masters program (2012-2018)
  • Member of EPSRC’s Research Infrastructure Strategic Advisory Team (2011-2015)
  • Member of the new UKRI e-infrastruction advisory board (2018-)
  • Member of EPSRC’s resource allocation panel (RAP) for HECToR then ARCHER, the UK’s national supercomputer resources
  • Regular member of the organising and programme committees for IEEE/ACM SuperComputing and ISC

Industrial experience

As a founder at ClearSpeed I had various senior technical roles between 2002 and 2008 including VP of Applications and Director of Architecture. I co-developed the architecture of our record-breaking many-core processors, including the 192 core CSX700, 96 core CSX600, and 64 core CS301 prototype.

At Pixelfusion I was a microprocessor architect and low-level GPU driver developer for our innovative 1,536-core graphics processor, the F150. This was the first fully programmable, true GPGPU, which also included the world’s fastest Rambus implementation at the time (4 channels delivering 6.4 GBytes/s, a lot in the year 2000!), and the first commercial implementation of an Arc core. It also pioneered using redundant cores to tolerate manufacturing defects in many-core devices.

Workshops and Tutorials

I am passionate about equipping the HPC community, university students and industrial partners with high performance computing skills they will need in order to develop fast, efficient and sustainable scientific software which can run on the latest architectures.

To achieve these goals, I run many tutorials and workshops in parallel programming, especially using HPC parallel programming languages such as MPI, OpenMP, Kokkos, OpenCL and so on. In addition to the university courses I run, I also run courses for industrial partners and other academic institutions. Courses can be anything from a 1/2 day introduction, to a 5-day advanced workshop. Please get in touch if you’re interested in having such a course run for your group.

I am the creator of the HandsOnOpenCL online course for OpenCL. This course has been accessed over 8,000 unique times as of April 2018.


Current units

  • Advanced Computer Architecture with David May (COMSM0109): This course enables you to really understand how processors work and how best to exploit modern processor features from software.

  • Introduction to High Performance Computing with Gethin Williams (COMS30005): This course takes you through the theory and hands-on practise of high performance computing, using OpenMP and MPI to write codes that will scale across all the cores of a modern high-end server.

  • Advanced High Performance Computing (COMS30006): This course builds on my Intro to HPC unit, extending to advanced topics such as parallel programming models (MPI+X, GPU programming etc), and applying these to the latest cutting edge computer architectures.

Previous units

  • HiTec Enterprise with Grev Cummins (COMS12900): First year introductory course to innovation and entrepreneurship. This course will equip you with highly marketable skills that will prove valuable through your remaining time in Bristol, and beyond.

  • Individual project business plan (COMSM0306): Fourth year course. Advanced topics on how real companies work, innovation, entrepreneurship and transferrable skills. This is one of the top courses of its kind anywhere in the world (we know, we did the benchmarking), and will make you extremely marketable. The skills you learn here will be incredibly valuable throughout your entire career, no matter what kind of roles you choose. Information


Room 3.09 Merchant Venturers Building Department of Computer Science University of Bristol Woodland Road Bristol BS8 1UB, United Kingdom

Email: simonm at cs dot bris dot ac dot uk Twitter: simonmcs

Phone: +44 (0)117 33 15324 Fax: +44 (0)117 9545208